At the end of the lecture, the students will be able to verify, to test digital architectures and to analyse the vulnerabilities of embedded systemes. Then, they will be able to perform attacks and to design appropriate countermeasures.
Neccessary: Hardware Description Language (HDL, verilog or VHDL) for simulation (testbench) and design, logical synthesis, FPGA, processor architecture (processor models, instruction set architecture), C programming
Ideally: bases of object oriented programming
E1 = Terminal Exam, First session, written, 3h, only document allowed "syntaxe VHDL", no calculator
TP = average of laboratory exams
E2 = Exam, Second session, written 3h, only document allowed "syntaxe VHDL", no calculator
The course exists in the following branches:
Date of update January 10, 2018