Aller au menu Aller au contenu
Academics
Academics
Academics

> Study at Esisar > Engineering Programs

Digital circuits - 3AMCE318

A+Augmenter la taille du texteA-Réduire la taille du texteImprimer le documentEnvoyer cette page par mail cet article Facebook Twitter Linked In
  • Number of hours

    • Lectures : 7.5
    • Tutorials : 7.5
    • Laboratory works : 9.0
    • Projects : -
    • Internship : -
    • Written tests : -
    ECTS : 2.0
  • Officials : Vincent BEROULLE

Goals

Design of simple digital system on programmable components (CPLD and FPGA)
Understanding basic componentsof computer.

Content

*#Fundamental of digital electronics
**Binary numbers & arithmetic
**Boolean algebra & logical components
**Combinational logic & arithmetic circuits
**Sequential logic & finite state machines
*#Introduction to VHDL
*#VHDL basis
*#Programmable components

Laboratories
Simulation and logical synthesis of simple functions written in VHDL

Prerequisites

Algorithm, programming basis

Tests

CC = Mean of laboratory marks and homeworks
E1 = Terminal Exam, First session, written, 1h30, only document allowed "syntaxe VHDL", no calculator
E2 = Exam, Second session, written 1h30, only document allowed "syntaxe VHDL", no calculator

Calendar

The course exists in the following branches:

see the course schedule for 2021-2022

Additional Information

Course ID : 3AMCE318
Course language(s): FR

The course is attached to the following structures:

  • Team Hardware and software systems

You can find this course among all other courses.

Bibliography

*VHDL, du langage au circuit, du circuit au langage, J. Weber, M. Meaudre, Masson
*Initiation au langage VHDL, Michel Aumiaux, Dunod
*VHDL, langage, modélisation, synthèse, Airiau, Bergé, Olive, Rouillard, P. P. Romandes
*Circuits numériques et synthèse logique, un outil: VHDL, J.Weber, M. Meaudre, Masson
VHDL, Introduction à la synthèse logique, P. Larcher, Eyrolles

A+Augmenter la taille du texteA-Réduire la taille du texteImprimer le documentEnvoyer cette page par mail cet article Facebook Twitter Linked In

Date of update April 7, 2021

Université Grenoble Alpes